IP-QuadUART-485
Last updated: June 7, 2006
Company:
- Dynamic Engineering
Description:
- The IndustryPack compatible IP-QuadUART-485 design integrates a quad UART onto an IndustryPack module. The UART (16C854) features 128 byte FIFOs for RX and TX ports on each channel. The UART is supported by an advanced IP module interface implemented within a Xilinx FPGA.
The UART is a character based interface [8 bits]. The IndustryPack interface has several features which optimize performance. Words can be written to the IP-QuadUART-485 and the data will be coverted to bytes before being sent to the UART. The IP interface will latch the data allowing the host computer to be released while the data is being moved to the UART. The early release allows pipelined operation and increased performance. When the IP-QuadUART-485 is mounted to a carrier which supports 32 bit operations the effect can be enhanced. The PCI3IP, PCI5IP , and cPCI2IPand other Dynamic Engineering carriers support 32 bit access to IndustryPacks.
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