Moore's Law gets everyone going,but not in the same way. Bankers rub hands gleefully (or used to, until Mitsubishi proved them wrong) at the prospect of fat profits from millions of system-on-chip (SoC) units enabling new applications' markets, or replacing older technologies in existing ones.Marketers drool over reduced time-to-market for new-sophisticated products. The user community gets excited at thoughts of improved reliability and reduced costs in wiring, payload weight, power consumption etc. The engineering community rips its hair out in trying to figure out how to usefully use all that on-chip real estate and fill it with reusable, pre-verified IP.

Did I say reduced power consumption? Yes - but, here's a good one: did you realise that if the exponential growth in the use of integrated circuits continues, it's possible to demonstrate that all the energy in our galaxy will be used up within 180 years? We also suspect that the 2nd Law of Entropy is at work. Cosmic cataclysms aside, if you look at it carefully enough, the SoC scene started off well, but may move gradually into a state of disarray. Let's start at the top and work down.

Firstly, why do you need to implement SoC anyway? The approach is certainly not the panacea to packaging, power and profits that many people appear to believe. How well does a SoC architecture really fit as an answer to your market opportunity or engineering problem? Is it the pot of gold you thought it was? Take any realm of digital signal processing that needs a bit of intelligence as an example - let's say, image processing. And let's not just talk about CCD sensors - let's talk systems - say, ision. So - what's so complicated about a camera on a chip?

It's got an imager. It's got memory. It's got a processor. It's got a CODEC. It's got optics. And you're going to put all that on a single crystal of silicon. But - how do you test and validate all those items? Are you sure you wouldn't be better off with a system-in-package? All the interfaces are internal to the chip - so you can't use hardware tracers to weed out problems. The trusty in-circuit-emulator for your chosen processor IP block won't help you either - the processor is embedded.

Well, you could adapt, port and use a ROM monitor: but how do you debug the monitor? On-Chip Debugging (OCD): well, JTAG is certainly an option. But just cross your fingers that your test results prove positive - because if you have to dig around the CPU - well, try it and tell me. And anyway, even before you get to the technicalities - how well are your software and hardware architects communicating? We observed that several hardware features are never used; some will never be used because software people think differently and others make the software design task into a nightmare. If you are still tempted to go for SoC, let's just hope that you get it right first time.
 
 

Dr Martin Timmerman
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