Wideband IF Recorder using the PM430, SMT349 and SMT3310 (COTS) modules

Publication date on this website: Tuesday, November 02, 2004
Company: PARSEC (Pty) Ltd
Category: Press Releases : Systems

Summary:
The purpose of the system is to calculate the FFT power spectra of an input signal in real-time and to store the calculated power spectra to disk. A picture of the Wideband IF Recorder is shown.

Full Text:
A Wideband IF Receiver downconverts a 10 to 500MHz RF signal with a 40MHz bandwidth to a center frequency of 25MHz. The baseband signal is then sampled at 100MSPS by the SMT349, real-time DFT processing is done by the PM430 and the FFT power specta results are streamed across the PCI bus to the host PC where it is stored to disk. Up to 60 GB of FFT power spectra can continuously be stored to disk (2-3 hours) without any data loss. Application software running on the host PC sets-up the hardware and starts the capturing process.

The key system conmponents are listed below:
·PM430: Dual PMC FPGA processing module with three ALTERA EP1S25 Stratix FPGAs and 10Mbytes of ZBT memory for processing intensive DSP applications
·SMT349: 10-bit ADC module sampling at 100MSPS
·SMT3310: CPCI carrier hosting the Wideband IF Receiver and SMT349 ADC module
·Wideband IF Receiver: Synthesized Wideband Downconverter with a 10-500MHz input range and a 40MHz -3dB IF bandwidth
·PP PSE/P23: Pentium II, 333MHz CPCI processor board from Concurrent Technologies running Windows 2000
·PP PMC/002: Dual PMC 64-bit/33MHz CPCI carrier from Concurrent Technologies
·CPCI Rack: Standard 4U rack that can accommodate 3 double slot or 6 single slot CPCI cards.

The Wideband IF Receiver makes use of three IF stages to downconvert a 10-500MHz input signal with 40MHz bandwidth to a 25MHz center frequency. The centre frequency of the input signal can be set in 5MHz steps.
The SMT349 ADC module is plugged onto the SMT3310 CPCI carrier board. The SMT349 samples the base-band input at 100MSPS and routes the 10-bit data to the Interface FPGA on the SMT3310 through two Sundance Digital Busses (SDB) at 50MHz. From there it is routed to the J3 back-plane connector on the SMT3310. A rear interface board connects J3 on the SMT3310 to J5 on the PMC carrier, which connects to the Interface FPGA on the PM430 via the PMC IOs.

The PM430 makes use of an ALTERA FFT core and DSP blocks inside the Stratix FPGA to perform real-time DFT processing at 160MHz. Windowing is done on each 2K samples of input data where after the ALTERA FFT core calculates a block floating point 2K complex FFT every 19.69uS. The power spectrum of the FFT result is calculated and 32 FFT power spectra are accumulated before streamed to disk via the host PC.

The ALTERA 32-bit master/target PCI core, together with a custom DMA engine is used to continuously transfer the FFT power spectra by means of master write transactions to the host PC. Although the PM430 is equipped with three Stratix 1S25 FPGAs, only one FPGA was required to implement the firmware required for this application.

The Application software allocates memory buffers on the host PC, sets-up the SMT3310 and PM430 hardware and initiates the DMA transactions from the PM430. Data is transferred to the PC and stored to disk at an average rate of 6.5Mbytes/s. Two to three hours of FFT power spectra (60 GB) can continuously be stored to disk without any data loss.

Contact:
Piet du Toit
PARSEC (Pty) Ltd
Tel: +27 12 678 9740
Fax: +27 12 678 9741
Email: piet@parsec.co.za
www.parsec.co.za