eXtreme Minimal Kernel (XMK)

Company:

Shift-Right Technologies, LLC

Description:

XMK is a preemptive multitasking kernel for microcontrollers. Its goal is to provide a RTOS small enough (RAM+ROM) to run on 8bit microcontrollers. XMK provides additional/optional features when scaling up to 16bit and 32bit platforms.

What makes XMK different from all of the other RTOS/Kernels available for microcontrollers? XMK was designed to be small first, then scaled up to more “resource rich” platforms. The following is brief list of features that define its target applications:

1) Very small ROM and RAM footprint. XMK was specifically designed to run on 8bit microcontrollers using on the only onboard ROM and RAM. XMK is practical to run on platforms that have as little as 8K of ROM and 512 bytes of RAM.
2) All services and/or interfaces in XMK are configurable. The application only includes (compiles & links) the services that are needed. XMK is scaleable.
3) XMK will run on virtually any platform (8/16/32bit). The limiting factors of XMK are: XMK is statically linked with the application, Single memory space, No support for MMUs, virtual memory, protected memory, etc.
4) Portable across microcontrollers, architectures, and compilers. The majority (+85%) of the XMK is source code is written in C with the well defined interfaces for the target/assembler dependent sections of the code.
5) XMK is free "as in beer". The XMK source code is licensed with a BSD style licensing agreement.

Product Properties

• Development Hosts:
  Windows, Linux
• Supported Target Processors:
  Hitachi H8s, H8300. Atmel AVR
• Board Support Packages:
  
• Supported Compilers:
  gcc, Hitachi's HEW2
• Supported Tools:
  
• Supported Networks:
  TCP/IP
• Supported Standards:
  
• Development Methodology:
  Cross
• RTOS Supplied as:
  Source
• Supported GUI:
  
• Available Components:
  
• Kernel ROM (min, max):
  336 bytes
• Kernel RAM (min, max):
  18 bytes
• Minimum RAM per process:
  
• Minimum RAM per thread:
  3 bytes
• Minimum RAM per queue:
  
• Number of thread priority levels:
  256
• Typical Thread Switch Latency:
  
• Guaranteed Maximum Interrupt Latency:
  
• System Clock Resolution:
  
• Priority Inversion Avoidance Mechanism:
  No
• Multiprocess Support:
  No
• Multiprocessor Support:
  No
• MMU Support:
  No
• Scheduling Policies:
  Prioritized FIFO
• Royalty Free:
  Yes
• Cost Development Seat:
  open source
• Standard Phone Support:
  Paid
• Preferred Phone Support:
  Paid