HyperKernel 4.3 - Abstract
The Hyperkernel 4.3 report evaluates Hyperkernel 4.3, the Windows NT Real-Time
Extension from Imagination Systems, Inc.
In order to clarify the content of the table of contents and the table of
figures, the reader is referred to the document "Report definition and test
plan".
To buy this report, go the Visitor's Center.
 |
The Hyperkernel 4.3 report evaluates Hyperkernel 4.3 from Imagination Systems,
Inc.
In order to clarify the content of the table of contents and the table of
figures, the reader is referred to the document "Report definition and test
plan".
| Page | ||
| 1 | Summary | 5 |
| 1.1 | Product | 5 |
| 1.2 | Positive points | 5 |
| 1.3 | Negative points | 5 |
| 1.4 | Ratings | 5 |
| 1.5 | Pricing | 5 |
| 2 | Introduction | 6 |
| 2.1 | Different steps in creating such evaluation report | 6 |
| 2.2 | Revision strategy | 6 |
| 3 | Technical evaluation | 7 |
| 3.1 | Installation and Configuration | 7 |
| 3.1.1 | Installation | 7 |
| 3.1.2 | Configuration | 7 |
| 3.2 | RTOS Architecture | 8 |
| 3.2.1 | System Architecture | 8 |
| 3.2.2 | Basic System Facilities | 9 |
| 3.3 | API Richness | 13 |
| 3.3.1 | POSIX | 13 |
| 3.3.2 | Task Management | 13 |
| 3.3.3 | Clock and Timer | 14 |
| 3.3.4 | Memory Management | 14 |
| 3.3.5 | Interrupt Handling | 15 |
| 3.3.6 | Synchronization and Exclusion Objects | 16 |
| 3.3.7 | Communication and Message Passing Objects | 18 |
| 3.3.8 | Remarks | 19 |
| 3.4 | Internet Support | 22 |
| 3.5 | Tools | 23 |
| 3.6 | Documentation and Support | 24 |
| 4.1 | Development methodology | 25 |
| 4 | Practical evaluation | 26 |
| 4.1 | System under test | 26 |
| 4.1.1 | Operating system configuration | 26 |
| 4.1.2 | Test configuration | 26 |
| 4.1.3 | Additional comments | 27 |
| 4.2 | Interrupt handling - Without rescheduling | 28 |
| 4.2.1 | Interrupt latency (IL-a-1.a) | 29 |
| 4.2.2 | Interrupt dispatch latency (IDL-a-1.a) | 30 |
| 4.3 | Interrupt handling - Rescheduling | 31 |
| 4.3.1 | Interrupt dispatch latency (IDL-b-1.a) | 34 |
| 4.4 | Thread | 35 |
| 4.4.1 | Creation (TF-a-1.a) | 36 |
| 4.4.2 | Deletion - after use (TF-c-2.a) | 37 |
| 4.5 | Thread switch latency - same process | 38 |
| 4.5.1 | Thread switch latency - cache enabled (TSL-a-2.a) | 39 |
| 4.5.2 | Thread switch latency - cache disabled (TSL-a-2.a) | 41 |
| 4.5.3 | Thread switch latency - cache enabled (TSL-a-10.a) | 42 |
| 4.5.4 | Thread switch latency - cache disabled (TSL-a-10.a) | 44 |
| 4.5.5 | Thread switch latency - cache enabled (TSL-a-128.a) | 45 |
| 4.5.6 | Thread switch latency - cache disabled (TSL-a-128.a) | 46 |
| 4.6 | Thread switch latency - different processes | 47 |
| 4.6.1 | Thread switch latency (TSL-b-2.a) | 48 |
| 4.6.2 | Thread switch latency (TSL-b-10.a) | 49 |
| 4.6.3 | Thread switch latency (TSL-b-32.a) | 50 |
| 4.7 | Counting semaphore | 51 |
| 4.8 | Binary semaphore | 52 |
| 4.9 | Mutex | 53 |
| 4.9.1 | Creation (SEO-a-1.a) | 54 |
| 4.9.2 | Deletion (SEO-b-1.a) | 55 |
| 4.9.3 | Deletion - after use (SEO-c-1.a) | 56 |
| 4.9.4 | No contention - Acquire (SEO-d-1.a) | 57 |
| 4.9.5 | No contention - Release (SEO-e-1.a) | 58 |
| 4.10 | File system - Proprietary | 59 |
| 5 | License policy and pricing | 60 |
| 6 | Conclusions | 61 |
| 7 | References | 62 |
| 8 | Abbreviations | 63 |
| Page | ||
| Figure 1 : | Hyperkernel System Architecture | 8 |
| Figure 4.2-1 | IL-a-1.a | 29 |
| Figure 4.2-2 | IL-a-1.a - frequency distribution | 29 |
| Figure 4.2-3 | IDL-a-1.a | 30 |
| Figure 4.2-4 | IDL-a-1.a - frequency distribution | 30 |
| Figure 4.3-1: | Flow chart for interrupt dispatch latency - rescheduling test | 33 |
| Figure 4.3-2 | IDL-b-1.a | 34 |
| Figure 4.3-3 | IDL-b-1.a - frequency distribution | 34 |
| Figure 4.4-1: | TF-a-1.a | 36 |
| Figure 4.4-2: | TF-a-1.a - frequency distribution | 36 |
| Figure 4.4-3 | TF-c-2.a | 37 |
| Figure 4.4-4 | TF-c-2.a - frequency distribution | 37 |
| Figure 4.5-1 | TSL-a-2.a | 39 |
| Figure 4.5-2 | TSL-a-2.a - frequency distribution | 39 |
| Figure 4.5-3: | TSL-a-2.a - Time slicing not bypassed | 40 |
| Figure 4.5-4: | TSL-a-2.a - Tine slicing not bypassed - frequency distribution | 40 |
| Figure 4.5-5 | TSL-a-2.a - cache disabled | 41 |
| Figure 4.5-6 | TSL-a-2.a - cache disabled - frequency distribution | 41 |
| Figure 4.5-7 | TSL-a-10.a | 42 |
| Figure 4.5-8: | TSL-a-10.a - exploded view | 42 |
| Figure 4.5-9 | TSL-a-10.a - frequency distribution | 43 |
| Figure 4.5-10 | TSL-a-10.a - cache disabled | 44 |
| Figure 4.5-11 | TSL-a-10.a - cache disabled - frequency distribution | 44 |
| Figure 4.5-12 | TSL-a-128.a | 45 |
| Figure 4.5-13 | TSL-a-128.a - frequency distribution | 45 |
| Figure 4.5-14 | TSL-a-128.a - No cache | 46 |
| Figure 4.5-15 | TSL-a-128.a - No cache - Exploded view | 46 |
| Figure 4.6-1 | TSL-b-2.a | 48 |
| Figure 4.6-2 | TSL-b-2.a - frequency distribution | 48 |
| Figure 4.6-3 | TSL-b-10.a | 49 |
| Figure 4.6-4 | TSL-b-10.a - frequency distribution | 49 |
| Figure 4.6-5 | TSL-b-32.a | 50 |
| Figure 4.6-6 | TSL-b-32.a - frequency distribution | 50 |
| Figure 4.9-1 | SEO-a-1.a
|
54 |
| Figure 4.9-2 | SEO-a-1.a - frequency distribution | 54 |
| Figure 4.9-3 | SEO-b-1.a | 55 |
| Figure 4.9-4 | SEO-b-1.a - frequency distribution | 55 |
| Figure 4.9-5 | SEO-c-1.a | 56 |
| Figure 4.9-6 | SEO-c-1.a - frequency distribution | 56 |
| Figure 4.9-7 | SEO-d-1.a | 57 |
| Figure 4.9-8 | SEO-d-1.a - frequency distribution | 57 |
| Figure 4.9-9 | SEO-e-1.a | 58 |
| Figure 4.9-10 | SEO-e-1.a - frequency distribution | 58 |
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